Pixel with supply-voltage insensitive drive current and driving method thereof

ABSTRACT

A pixel includes an organic light emitting diode, a first transistor configured to control an amount of a current flowing from a first power to a second power via a second node and the organic light emitting diode in response to a voltage of a first node, a first capacitor between the first node and a third node, a second capacitor between the second node and the third node, a second transistor between the third node and a data line and including a gate electrode coupled to a scan line, and a third transistor between the first power and the second node and including a gate electrode coupled to a first emission control line.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority to, and the benefit of, Korean PatentApplication No. 10-2015-0120976, filed on Aug. 27, 2015, in the KoreanIntellectual Property Office, the entire content of which isincorporated herein by reference in its entirety.

BACKGROUND

1. Field

Embodiments of the present invention relate to a pixel and a drivingmethod thereof.

2. Description of the Related Art

With development of information technology (IT), the importance ofdisplay devices (i.e., a medium between a user and information) isrecognized. In response, usage of display devices, such as liquidcrystal display (LCD) devices, organic light emitting display devices,etc. has increased.

Of the different types of display devices, the organic light emittingdisplay device is configured to display an image using organic lightemitting diodes emitting light by the recombination of electrons andholes, and has the advantages of quick response time and low powerconsumption.

An organic light emitting display device includes a plurality of pixelsarranged in a matrix at respective crossing regions of a plurality ofdata lines, a plurality of scan lines, and a plurality of power lines.The pixels generally include two or more transistors including a drivingtransistor, one or more capacitors, and an organic light emitting diode.

While the organic light emitting display device may consume less power,the amount of current flowing to the organic light emitting diodeschanges according to the threshold voltage deviation of a correspondingdriving transistor included in each pixel, resulting in displayirregularity. In other words, the characteristics of the drivingtransistors included in the pixels vary according to production processvariables. To overcome this problem, there has been proposed a solutionin which the driving transistor is connected in the form of a diode(e.g., is diode-connected) to compensate the threshold voltage of thedriving transistor. However, when the driving transistor isdiode-connected in the form of a diode, there may be 2 or more leakagepaths from a gate electrode of the driving transistor. Therefore, thevoltage of the gate electrode of the driving transistor is changedthrough a leakage path during a driving period, thereby decreasingreliability of display quality.

In addition, when the driving transistor is diode-connected, highvoltage is applied as a data signal in consideration of the thresholdvoltage of the driving transistor. Accordingly, high power consumptionbecomes an issue.

SUMMARY

Embodiments of the present invention relate to a pixel capable ofsecuring reliability of display quality, and a driving method thereof.

In an embodiment, a pixel may include an organic light emitting diode, afirst transistor configured to control an amount of a current flowingfrom a first power to a second power via a second node and the organiclight emitting diode in response to a voltage of a first node, a firstcapacitor between the first node and a third node, a second capacitorbetween the second node and the third node, a second transistor betweenthe third node and a data line and including a gate electrode coupled toa scan line, and a third transistor between the first power and thesecond node and including a gate electrode coupled to a first emissioncontrol line.

The second transistor may be configured to be turned on in response to ascan signal supplied to the scan line during a first period when thethird node is initialized, during a second period when a thresholdvoltage of the first transistor is compensated, and during a thirdperiod when a voltage corresponding to a data signal is stored.

A voltage of a reference power may be configured to be supplied to thedata line during the first period and the second period, and the datasignal may be configured to be supplied to the data line during thethird period.

The voltage of the reference power may be configured to be within avoltage range of data signals configured to be supplied to the dataline.

The second power may be configured to be a high voltage during the firstperiod, during the second period, and during the third period such thatthe organic light emitting diode is configured to be turned off, and thesecond power may be configured to be a low voltage during a fourthperiod such that the organic light emitting diode is configured to beturned on.

The third transistor may be configured to be turned on during the firstperiod, and may be configured to be turned off during the second periodand during the third period.

The pixel may further include a fourth transistor between the secondnode and the first transistor, and including a gate electrode coupled toa first control line.

The fourth transistor may be configured to be turned on during thesecond period such that the organic light emitting diode emits light.

The pixel may further include a fifth transistor between the first nodeand a reference power, and including a gate electrode coupled to asecond control line, and a sixth transistor between an anode electrodeof the organic light emitting diode and the reference power, andincluding a gate electrode coupled to a third control line.

The fifth transistor and the sixth transistor may be configured to beturned on during the first period, during the second period, and duringthe third period, and may be configured to be turned off when theorganic light emitting diode emits light.

The second control line may be electrically coupled to the third controlline.

The reference power may be configured to be within a voltage range ofdata signals configured to be supplied to the data line.

The pixel may further include a seventh transistor between the firsttransistor and an anode electrode of the organic light emitting diode,and including a gate electrode coupled to a second emission controlline.

The seventh transistor may be configured to be turned off during thefirst period, during the second period, and during the third period, andmay be configured to be turned on during a fourth period.

The pixel may further include a fourth transistor between the firsttransistor and an anode electrode of the organic light emitting diode,and including a gate electrode coupled to a first control line.

The fourth transistor may be configured to be turned on during thesecond period such that the organic light emitting diode emits light.

The pixel may further include a fifth transistor between the first nodeand a reference power, and including a gate electrode coupled to asecond control line, and a sixth transistor including a first electrodebetween an anode electrode of the organic light emitting diode and thefirst transistor, a gate electrode coupled to a third control line, anda second electrode coupled to the third control line.

The fifth transistor and the sixth transistor may be configured to beturned on during the first period, during the second period, and duringthe third period, and may be configured to be turned off when theorganic light emitting diode emits light.

In an embodiment, a pixel may include an organic light emitting diode, afirst transistor configured to control an amount of a current flowingfrom a first power coupled to a second power via a second node and theorganic light emitting diode in response to a voltage of a first node, afirst capacitor between the first node and a third node, a secondcapacitor between the second node and the third node, a secondtransistor between the first node and a data line and including a gateelectrode coupled to a scan line, a third transistor between the firstpower and the second node, and including a gate electrode coupled to afirst emission control line, and a fourth transistor between the secondnode and the first transistor, and including a gate electrode coupled toa first control line.

The second transistor may be configured to be turned on in response to ascan signal supplied to the scan line during a first period when thefirst node is initialized, during a second period when a thresholdvoltage of the first transistor is compensated, and during a thirdperiod when a voltage corresponding to a data signal is stored.

A voltage of a reference power may be configured to be supplied to thedata line during the first period and the second period, and the datasignal may be configured to be supplied to the data line during thethird period.

The voltage of the reference power may be configured to be within avoltage range of data signals configured to be supplied to the dataline.

The second power may be set to a high voltage during the first to thirdperiods such that the organic light emitting diode is configured to beturned off and may be set to a low voltage during other period such thatthe organic light emitting diode is configured to be turned on.

The third transistor may be configured to be turned on during the firstperiod and may be configured to be turned off during the second periodand the third period.

The fourth transistor may be configured to be turned on during thesecond period and when the organic light emitting diode emits light.

The pixel may further include a fifth transistor between the third nodeand a reference power and including a gate electrode coupled to a secondcontrol line, and a sixth transistor between an anode electrode of theorganic light emitting diode and the reference power and including agate electrode coupled to a third control line.

The fifth transistor and the sixth transistor may be configured to beturned on during the first period, the second period and the thirdperiod, and are configured to be turned off when the organic lightemitting diode emits light.

The second control line and the third control line may be electricallycoupled.

The reference power may be configured to be within a voltage range ofdata signals configured to be supplied to the data line.

The pixel may further include a fifth transistor between the third nodeand a reference power, and including a gate electrode coupled to asecond control line, and a sixth transistor between an anode electrodeof the organic light emitting diode and an initialization power, andincluding a gate electrode coupled to a third control line.

The fifth transistor and the sixth transistor may be configured to beturned on during the first period, during the second period, and duringthe third period, and may be configured to be turned off when theorganic light emitting diode emits light.

The reference power may be configured to be within a voltage range ofdata signals configured to be supplied to the data line, and theinitialization power may be configured to have a lower voltage than thatof data signals configured to be supplied to the data line.

The pixel may further include a fifth transistor between the third nodeand a reference power, and including a gate electrode coupled to asecond control line, and a sixth transistor including a first electrodecoupled to an anode electrode of the organic light emitting diode, agate electrode coupled to a third control line, and a second electrodecoupled to the third control line.

The fifth transistor and the sixth transistor may be configured to beturned on during the first period, during the second period, and duringthe third period, and may be configured to be turned off when theorganic light emitting diode emits light.

The pixel may further include a seventh transistor between the firsttransistor and an anode electrode of the organic light emitting diode,and including a gate electrode coupled to a second emission controlline.

The seventh transistor may be configured to be turned off during thefirst period, the second period, and the third period, and may beconfigured to be turned on during a fourth period.

In an embodiment, a method of driving a pixel including a firsttransistor configured to control an amount of a current flowing from afirst power to a second power via a second node and an organic lightemitting diode in response to a voltage of a first node, a firstcapacitor between the first node and a third node, and a secondcapacitor between the second node and the third node, the methodincluding supplying a voltage of a reference power to the first node andto the third node, supplying a voltage of the first power to the secondnode, maintaining the voltage of the reference power at the first nodeand at the third node, blocking electrical coupling between the secondnode and the first power, supplying the voltage of the reference powerto the first node, supplying a voltage of a data signal to the thirdnode, and controlling an amount of a current supplied from the firsttransistor to the organic light emitting diode in response to voltagesof the first capacitor and the second capacitor.

The method may further include setting the reference power within avoltage range of data signals.

The method may further include setting the voltage of the second node toa sum of the voltage of the reference power and a threshold voltage ofthe first transistor during the blocking the electrical coupling.

The method may further include setting the second node to a floatingstate during the supplying of the voltage of the data signal to thethird node.

In an embodiment, a method of driving a pixel including a firsttransistor configured to control an amount of a current flowing from afirst power to a second power via a second node and an organic lightemitting diode in response to a voltage of a first node, a firstcapacitor between the first node and a third node, and a secondcapacitor between the second node and the third node, the methodincluding supplying a voltage of a reference power to the first node andto the third node, supplying a voltage of the first power to the secondnode, maintaining the voltage of the reference power supplied to thefirst node and to the third node, blocking electrical coupling betweenthe second node and the first power, supplying the voltage of thereference power to the third node, supplying a voltage of a data signalto the first node, and controlling an amount of a current supplied fromthe first transistor to the organic light emitting diode in response tovoltages of the first capacitor and the second capacitor.

The method may further include setting the reference power within avoltage range of data signals.

The method may further include setting the voltage of the second node toa sum of the voltage of the reference power and a threshold voltage ofthe first transistor during the blocking the electrical coupling.

The method may further include setting the second node to a floatingstate during the supplying of the voltage of the data signal to thethird node.

In an embodiment, a pixel, and a method of driving the same, may controlthe amount of the current supplied to the organic light emitting dioderegardless of a voltage drop of the threshold voltage of the drivingtransistor and the voltage of the first power. Also, only one leakagepath is formed from the gate electrode of the driving transistor.Accordingly, reliability of display qualities may be secured.Additionally, the data signal may be directly supplied to thecapacitors, and accordingly, power consumption may be reduced bylowering the voltage range of the data signal.

BRIEF DESCRIPTION OF THE DRAWINGS

Example embodiments will now be described more fully hereinafter withreference to the accompanying drawings, wherein:

FIG. 1 illustrates an organic light emitting diode display device inaccordance with an embodiment;

FIG. 2 illustrates a pixel according to a first embodiment;

FIG. 3 illustrates an embodiment of a method for driving the pixel shownin FIG. 2;

FIG. 4 illustrates an embodiment in which the driving waveform shown inFIG. 3 is applied in concurrent driving;

FIG. 5 illustrates a pixel according to a second embodiment;

FIG. 6 illustrates a pixel according to a third embodiment;

FIG. 7 illustrates an embodiment of a method for driving the pixel shownin FIG. 6;

FIG. 8 illustrates an embodiment in which the driving waveform shown inFIG. 7 is applied in concurrent driving;

FIG. 9 illustrates a pixel according to a fourth embodiment;

FIG. 10 illustrates an embodiment of a method for driving the pixelshown in FIG. 9;

FIG. 11 illustrates a pixel according to a fifth embodiment;

FIG. 12 illustrates a pixel according to a sixth embodiment;

FIG. 13 illustrates a pixel according to a seventh embodiment;

FIG. 14 illustrates a pixel according to an eighth embodiment;

FIG. 15 illustrates a pixel according to a ninth embodiment;

FIG. 16 illustrates a pixel according to a tenth embodiment; and

FIG. 17 illustrates a pixel according to an eleventh embodiment.

DETAILED DESCRIPTION

Features of the inventive concept and methods of accomplishing the samemay be understood more readily by reference to the following detaileddescription of embodiments and the accompanying drawings. The inventiveconcept may, however, be embodied in many different forms and should notbe construed as being limited to the embodiments set forth herein.Hereinafter, example embodiments will be described in more detail withreference to the accompanying drawings, in which like reference numbersrefer to like elements throughout. The present invention, however, maybe embodied in various different forms, and should not be construed asbeing limited to only the illustrated embodiments herein. Rather, theseembodiments are provided as examples so that this disclosure will bethorough and complete, and will fully convey the aspects and features ofthe present invention to those skilled in the art. Accordingly,processes, elements, and techniques that are not necessary to thosehaving ordinary skill in the art for a complete understanding of theaspects and features of the present invention may not be described.Unless otherwise noted, like reference numerals denote like elementsthroughout the attached drawings and the written description, and thus,descriptions thereof will not be repeated. In the drawings, the relativesizes of elements, layers, and regions may be exaggerated for clarity.

It will be understood that, although the terms “first,” “second,”“third,” etc., may be used herein to describe various elements,components, regions, layers and/or sections, these elements, components,regions, layers and/or sections should not be limited by these terms.These terms are used to distinguish one element, component, region,layer or section from another element, component, region, layer orsection. Thus, a first element, component, region, layer or sectiondescribed below could be termed a second element, component, region,layer or section, without departing from the spirit and scope of thepresent invention.

Spatially relative terms, such as “beneath,” “below,” “lower,” “under,”“above,” “upper,” and the like, may be used herein for ease ofexplanation to describe one element or feature's relationship to anotherelement(s) or feature(s) as illustrated in the figures. It will beunderstood that the spatially relative terms are intended to encompassdifferent orientations of the device in use or in operation, in additionto the orientation depicted in the figures. For example, if the devicein the figures is turned over, elements described as “below” or“beneath” or “under” other elements or features would then be oriented“above” the other elements or features. Thus, the example terms “below”and “under” can encompass both an orientation of above and below. Thedevice may be otherwise oriented (e.g., rotated 90 degrees or at otherorientations) and the spatially relative descriptors used herein shouldbe interpreted accordingly.

It will be understood that when an element or layer is referred to asbeing “on,” “connected to,” or “coupled to” another element or layer, itcan be directly on, connected to, or coupled to the other element orlayer, or one or more intervening elements or layers may be present. Inaddition, it will also be understood that when an element or layer isreferred to as being “between” two elements or layers, it can be theonly element or layer between the two elements or layers, or one or moreintervening elements or layers may also be present.

The terminology used herein is for the purpose of describing particularembodiments only and is not intended to be limiting of the presentinvention. As used herein, the singular forms “a,” “an,” and “the” areintended to include the plural forms as well, unless the context clearlyindicates otherwise. It will be further understood that the terms“comprises,” “comprising,” “includes,” and “including,” when used inthis specification, specify the presence of the stated features,integers, steps, operations, elements, and/or components, but do notpreclude the presence or addition of one or more other features,integers, steps, operations, elements, components, and/or groupsthereof. As used herein, the term “and/or” includes any and allcombinations of one or more of the associated listed items. Expressionssuch as “at least one of,” when preceding a list of elements, modify theentire list of elements and do not modify the individual elements of thelist.

As used herein, the term “substantially,” “about,” and similar terms areused as terms of approximation and not as terms of degree, and areintended to account for the inherent deviations in measured orcalculated values that would be recognized by those of ordinary skill inthe art. Further, the use of “may” when describing embodiments of thepresent invention refers to “one or more embodiments of the presentinvention.” As used herein, the terms “use,” “using,” and “used” may beconsidered synonymous with the terms “utilize,” “utilizing,” and“utilized,” respectively. Also, the term “exemplary” is intended torefer to an example or illustration.

The electronic or electric devices and/or any other relevant devices orcomponents according to embodiments of the present invention describedherein may be implemented utilizing any suitable hardware, firmware(e.g. an application-specific integrated circuit), software, or acombination of software, firmware, and hardware. For example, thevarious components of these devices may be formed on one integratedcircuit (IC) chip or on separate IC chips. Further, the variouscomponents of these devices may be implemented on a flexible printedcircuit film, a tape carrier package (TCP), a printed circuit board(PCB), or formed on one substrate. Further, the various components ofthese devices may be a process or thread, running on one or moreprocessors, in one or more computing devices, executing computer programinstructions and interacting with other system components for performingthe various functionalities described herein. The computer programinstructions are stored in a memory which may be implemented in acomputing device using a standard memory device, such as, for example, arandom access memory (RAM). The computer program instructions may alsobe stored in other non-transitory computer readable media such as, forexample, a CD-ROM, flash drive, or the like. Also, a person of skill inthe art should recognize that the functionality of various computingdevices may be combined or integrated into a single computing device, orthe functionality of a particular computing device may be distributedacross one or more other computing devices without departing from thespirit and scope of the exemplary embodiments of the present invention.

Unless otherwise defined, all terms (including technical and scientificterms) used herein have the same meaning as commonly understood by oneof ordinary skill in the art to which the present invention belongs. Itwill be further understood that terms, such as those defined in commonlyused dictionaries, should be interpreted as having a meaning that isconsistent with their meaning in the context of the relevant art and/orthe present specification, and should not be interpreted in an idealizedor overly formal sense, unless expressly so defined herein.

FIG. 1 illustrates an organic light emitting diode display device inaccordance with an embodiment.

Referring to FIG. 1, an organic light emitting diode display deviceaccording to an embodiment may include pixels 142 provided at respectivecrossing regions of scan lines S1 to Sn and data lines D1 to Dm, a scandriver 110 for driving the scan lines S1 to Sn and a first emissioncontrol line E1, a control driver 120 for driving a first control lineCL1, a second control line CL2 and a third control line CL3, a datadriver 130 for driving the data lines D1 to Dm, and a timing controller150 for controlling the scan driver 110, the control driver 120 and thedata driver 130.

The scan driver 110 may supply a scan signal to the scan lines S1 to Sn,and may supply scan signals to the scan lines Si to Sn sequentially orconcurrently, depending on a method for driving the pixels 142.

The scan driver 110 may supply a first emission control signal to afirst emission control line E1 commonly coupled to the pixels 142. Forexample, but without limitation, the scan driver 110 may supply a firstemission control signal to the first emission control line E1 such thatit overlaps the scan signals supplied to the scan lines S1 to Sn.

Additionally, although FIG. 1 shows the first emission control line E1as being commonly coupled to the pixels 142, the present invention isnot limited thereto. For example, if the pixels 142 are drivensequentially, the first emission control line E1 may be formed at everyrow with the scan lines S1 to Sn. Meanwhile, the scan signal suppliedfrom the scan driver 110 may be a gate on voltage, such that atransistor included in the pixels 142 may be turned on, and the firstemission control signal may be set to a gate off voltage, such thatanother transistor included in the pixels 142 may be turned off.

The control driver 120 may supply a first control signal to a firstcontrol line CL1, a second control signal to a second control line CL2,and a third control signal to a third control line CL3, the first tothird control lines CL1 to CL3 each being commonly coupled to the pixels142. The supply timing of the first control signal to the third controlsignal will be described with reference to a waveform diagram describedbelow. Additionally, although FIG. 1 shows the first control line CL1 tothe third control line CL3 to be commonly coupled to the pixels 142, thepresent invention is not limited thereto. For example, if the pixels 142are driven sequentially, the first control line CL1 to the third controlline CL3 may be formed at every parallel line (e.g., every row).Meanwhile, the first control signal to the third control signal suppliedfrom the scan driver 110 may be a gate on voltage such that acorresponding transistor included in the pixels 142 may be turned on.

The data driver 130 may supply a voltage of a reference power Vref, andmay supply a data signal to the data lines D1 to Dm. Here, the referencepower Vref may be within a voltage range of the data signals capable ofbeing supplied from the data driver 130.

The timing controller 150 may control the scan driver 110, the controldriver 120 and the data driver 130 in response to synchronizationsignals supplied from outside.

A display unit 140 refers to a display area where images may bedisplayed. The display unit 140 may include the pixels 142 provided inan area defined by the scan lines S1 to Sn, the data lines D1 to Dm, thefirst emission control line E1, the first control line CL1, the secondcontrol line CL2 and the third control line CL3. The pixels 142 maycharge a voltage corresponding to the reference power Vref and the datasignal while passing through an initialization period, through athreshold voltage compensation period, and through a data writingperiod, and may control an amount of a current flowing from a firstpower ELVDD to a second power ELVSS via an organic light emitting diode.As such, the organic light emitting diode may generate light havingluminance corresponding to an amount of current therethrough during alight emission period.

Additionally, a voltage of the second power ELVSS may maintain a highvoltage during the initialization period, during the threshold voltagecompensation period, and during the data writing period, and maymaintain a low voltage during the light emission period. Here, the highvoltage refers to a voltage where the pixels 142 do not emit light, andthe low voltage refers to a voltage where the pixels 142 may emit light.

Also, although FIG. 1 shows that the first emission control line E1 isdriven by the scan driver 110, and that the first control line CL1 tothe third control line CL3 are controlled by the control driver 120, thepresent invention is not limited thereto. For example, drivers fordriving each of the lines E1, CL1, CL2, and CL3 may be added, or onedriver may drive all of the lines E1, CL1, CL2, and CL3.

FIG. 2 illustrates a pixel according to a first embodiment. FIG. 2 showsa pixel coupled to an m-th data line Dm and an n-th scan line Sn.

Referring to FIG. 2, the pixel 142 according to the present embodimentmay include an organic light emitting diode OLED, and a pixel circuit144 for controlling an amount of a current supplied to the organic lightemitting diode OLED.

An anode electrode of the organic light emitting diode OLED may becoupled to the pixel circuit 144, and a cathode electrode of the organiclight emitting diode OLED may be coupled to a second power ELVSS. Theorganic light emitting diode OLED may generate light having luminancecorresponding to an amount of a current supplied from the pixel circuit144. For this, the first power ELVDD may be set to a voltage that ishigher than a voltage of the second power ELVSS during a light emissionperiod.

The pixel circuit 144 may control the amount of the current flowing tothe organic light emitting diode OLED in response to a data signal. Forthis, the pixel circuit 144 may include first to sixth transistors M1 toM6, a first capacitor C1, and a second capacitor C2.

A first electrode of the first transistor M1 may be coupled to the firstpower ELVDD via the fourth transistor M4, a second node N2, and thethird transistor M3. A second electrode of the first transistor M1 maybe coupled to the anode electrode of the organic light emitting diodeOLED. A gate electrode of the first transistor M1 may be coupled to afirst node N1. The first transistor M1 may control the amount of thecurrent flowing to the second power ELVSS from the first power ELVDD viathe organic light emitting diode OLED in response to a voltage of thefirst node N1.

The second transistor M2 may be coupled between the data line Dm and athird node N3. The gate electrode of the second transistor M2 may becoupled to the scan line Sn. The second transistor M2 may be turned onwhen the scan signal is supplied to the scan line Sn, therebyelectrically coupling the data line Dm and the third node N3.

The third transistor M3 may be coupled between the first power ELVDD andthe second node N2. The gate electrode of the third transistor M3 may becoupled to the first emission control line E1. The third transistor M3may be turned off when the first emission control signal is supplied tothe first emission control line E1, and may be turned on in othersituations. When the third transistor M3 is turned on, the voltage ofthe first power ELVDD may be supplied to the second node N2.

The fourth transistor M4 may be coupled between the second node N2 andthe first electrode of the first transistor M1. The gate electrode ofthe fourth transistor M4 may be coupled to the first control line CL1.The fourth transistor M4 may be turned on when the first control signalis supplied to the first control line CL1, thereby electrically couplingthe first transistor M1 and the second node N2.

The fifth transistor M5 may be coupled between the first node N1 and thereference power Vref. The gate electrode of the fifth transistor M5 maybe coupled to the second control line CL2. The fifth transistor M5 maybe turned on when the second control signal is supplied to the secondcontrol line CL2, thereby supplying the voltage of the reference powerVref to the first node N1. The reference power Vref may be within avoltage range of the data signals capable of being supplied from thedata driver 130.

The sixth transistor M6 may be coupled between the anode electrode ofthe organic light emitting diode OLED and the reference power Vref. Thegate electrode of the sixth transistor M6 may be coupled to the thirdcontrol line CL3. The sixth transistor M6 may be turned on when thethird control signal is supplied to the third control line CL3, therebysupplying the voltage of the reference power Vref to the anode electrodeof the organic light emitting diode OLED.

The first capacitor Cl may be coupled between the first node N1 and thethird node N3. The second capacitor C2 may be coupled between the secondnode N2 and the third node N3. The first capacitor C1 and the secondcapacitor C2 may respectively charge a certain voltage corresponding tothe data signal.

FIG. 3 illustrates an embodiment of a method for driving the pixel shownin FIG. 2.

Referring to FIG. 3, the pixel 142 may be driven in a first period T1,which is an initialization period, may be driven in a second period T2,which is a threshold voltage compensation period, may be driven in athird period T3, which is a data writing period, and may be driven in afourth period T4, which is a light emission period.

The scan signal may be supplied to the scan line Sn during the firstperiod T1, the second period T2, and the third period T3. The firstemission control signal may be supplied to the first emission controlline E1 during the second period T2 and during the third period T3. Thefirst control signal may be supplied to the first control line CL1during the second period T2 and the fourth period 14. The second controlsignal may be supplied to the second control line CL2, and the thirdcontrol signal may be supplied to the third control line CL3, during thefirst period T1 to the third period T3.

The data driver 130 may supply the voltage of the reference power Vrefto the data line Dm during the first period T1 and the second period T2,and may supply the data signal DS to the data line Dm during the thirdperiod T3. The second power ELVSS may be set to a high voltage duringthe first period T1 to the third period T3, and may be set to a lowvoltage during the fourth period 14.

The operations are described in detail as follows. The second transistorM2 may be turned on in response to the scan signal supplied to the scanline Sn during the first period T1. The fifth transistor M5 may beturned on response to the second control signal supplied to the secondcontrol line CL2. The sixth transistor M6 may be turned on in responseto the third control signal supplied to the third control line CL3.

When the sixth transistor M6 is turned on, the voltage of the referencepower Vref may be supplied to the anode electrode of the organic lightemitting diode OLED. When the second transistor M2 is turned on, thedata line Dm and the third node N3 may be electrically coupled, and thevoltage of the reference power Vref from the data line Dm may besupplied to the third node N3. When the fifth transistor M5 is turnedon, the voltage of the reference power Vref may be supplied to the firstnode N1. Here, the third node N3 and the first node N1 may be set to thesame voltage, and accordingly, the first capacitor C1 may beinitialized. Additionally, because the third transistor M3 is turned onduring the first period T1, the second node N2 may be set to the voltageof the first power ELVDD.

During the second period T2, the first emission control signal may besupplied to the first emission control line E1, thereby turning off thethird transistor M3. During the second period 12, the first controlsignal may be supplied to the first control line CL1, thereby turning onthe fourth transistor M4.

When the third transistor M3 is turned off, the first power ELVDD andthe second node N2 may be electrically blocked. When the fourthtransistor M4 is turned on, the second node N2 and the first transistorM1 may be electrically coupled.

Here, during the second period T2, the first node N1 and the third nodeN3 may maintain the voltage of the reference power Vref. Accordingly,during the second period T2, the voltage of the second node N2 may dropfrom the voltage of the first power ELVDD to a voltage that is the sumof the reference power Vref and the threshold voltage of the firsttransistor M1. The voltage that corresponds to the threshold voltage ofthe first transistor M1 may be stored in the second capacitor C2.Additionally, because the second power ELVSS is set to a high voltage,the current from the first transistor M1 may flow to the reference powerVref via the sixth transistor M6.

The supply of the first control signal to the first control line CL1 maybe stopped during the third period T3. Accordingly, the fourthtransistor M4 may be turned off. During the third period T3, the datasignal DS may be supplied to the data line Dm.

The data signal DS supplied to the data line Dm may be supplied to thethird node N3. The third node N3 may be set to the voltage of the datasignal DS. Here, the first node N1 may maintain the voltage of thereference power Vref, and accordingly, the voltage corresponding to thedata signal DS may be stored in the first capacitor C1. Additionally,during the third period T3, the second node N2 may be set to a floatingstate, and accordingly, the second capacitor C2 may maintain the voltagecharged in a previous period. In other words, the voltage of the firstnode N1, the voltage of the second node N2, and the voltage of the thirdnode N3 during the third period T3 may be determined by the followingFormula 1.N1=Vref N2=Vref+Vth+ΔN2=Vdata+Vth N3=Vdata (ΔN2=Vdata−Vref)   Formula 1

In Formula 1 above, Vref refers to the voltage of the reference power,Vdata refers to the voltage of the data signal DS, ΔN2 refers to theamount of voltage change of the second node N2, and Vth refers to thethreshold voltage of the first transistor M1.

The supply of the first emission control signal to the first emissioncontrol line E1 may be stopped during the fourth period T4, therebyturning on the third transistor M3. Also, the supply of the scan signalto the scan line Sn may be stopped, thereby turning off the secondtransistor M2. Also, during the fourth period T4, the first controlsignal may be supplied to the first control line CL1, thereby turning onthe fourth transistor M4. Also, the supply of the second control signaland the third control signal to the second control line CL2 and thethird control line CL3 may be stopped, thereby turning off the fifthtransistor M5 and the sixth transistor M6.

When the third transistor M3 is turned on, the voltage of the firstpower ELVDD may be supplied to the second node N2. The voltage of thesecond node N2 may increase to the voltage of the first power ELVDD fromthe voltage that is a sum of the voltage of the reference power Vref andthe threshold voltage of the first transistor M1. Here, because thethird node N3 and the first node N1 are set to a floating state, thefirst capacitor C1 and the second capacitor C2 may maintain the voltageof the previous period. The voltage of the first node N1, the secondnode N2, and the third node N3 during the fourth period 14 maycorrespond to Formula 2 below.N1=Vref+ΔN2=Vref+ELVDD−(Vdata+Vth) N2=ELVDD N3=Vdata+ΔN2=ELVDD−Vth  Formula 2

When the fourth transistor M4 is turned on, the second node N2 and thefirst transistor M1 are electrically coupled. The first transistor M1may control the amount of the current that flows from the first powerELVDD to the second power ELVSS via the organic light emitting diodeOLED in response to the voltage of the first node N1. Therefore, theorganic light emitting diode OLED may generate light having a luminancecorresponding to the amount of the current supplied from the firsttransistor M1 during the fourth period 14. Additionally, the current,which may be represented as current I, and which is supplied from thefirst transistor M1 to the organic light emitting diode, corresponds toFormula 3 below.

$\begin{matrix}\begin{matrix}{I = {k\left( {{Vsg} - {{Vth}}} \right)}^{2}} \\{= {k\left( {{ELVDD} - {Vref} - {ELVDD} + {Vdata} + {Vth} - {{Vth}}} \right)}^{2}} \\{= {k\left( {{Vdata} - {Vref}} \right)}^{2}}\end{matrix} & {{Formula}\mspace{14mu} 3}\end{matrix}$

In Formula 3, k refers to a constant. Referring to Formula 3, thecurrent I flowing from the first transistor M1 to the organic lightemitting diode OLED may correspond to a voltage difference between avoltage Vdata of the data signal DS and a voltage of the reference powerVref. Here, the reference power Vref is a static voltage. Therefore, thecurrent I supplied to the organic light emitting diode OLED maycorrespond to the voltage of the data signal DS.

Also, as shown in Formula 3, the current I supplied to the organic lightemitting diode OLED may be determined without reference to the firstpower ELVDD and the threshold voltage Vth of the first transistor M1.Therefore, the current I may be supplied to the organic light emittingdiode OLED regardless of the difference between the voltage drop of thefirst power ELVDD and the threshold voltage of the first transistor M1.Accordingly, reliability of image quality may be secured.

Additionally, the data signal DS may be directly supplied to thecapacitors C1 and C2, and accordingly, consumption of power may bedecreased as the voltage range of the data signal DS is lowered. Inaddition, the pixel 142 may form only one leakage path from the firstnode N1 (e.g., a path from M5 to Vref), and accordingly, reliability ofimage quality may be secured. Furthermore, because the reference powerVref included in the leakage path is set to be within the voltage rangeof the data signals DS, leakage current due to the leakage path may bereduced or minimized.

The pixels 142 may generate light having luminance by repeating thefirst period T1 to the fourth period T4.

FIG. 4 illustrates an embodiment in which the driving waveform shown inFIG. 3 is applied in concurrent driving.

Referring to FIG. 4, if the pixels 142 are driven concurrently, the scansignals may be concurrently supplied to the scan lines S1 to Sn duringthe first period T1 and the second period T2. The threshold voltage ofthe first transistor M1 may be compensated in each of the pixels 142during the first period T1 and the second period T2.

If the pixels 142 concurrently compensate the threshold voltage,sufficient time may be allocated during the second period T2, andaccordingly, each of the pixels 142 may compensate the threshold voltageof the first transistor M1 in a stable manner.

During a third period T13′, the scan signal may be sequentially suppliedto the scan lines S1 to Sn, and the data signal DS may be supplied tothe data lines D1 to Dm. The pixels 142 may be sequentially selected bythe scan signal supplied to the scan lines S1 to Sn, and may store thevoltage corresponding to the data signal DS.

During the fourth period T4, the pixels 142 may concurrently emit lightcorresponding to the voltage of the data signal DS stored during thethird period T3′.

The driving waveform shown in FIG. 4 illustrates the data signal DSbeing sequentially stored in horizontal line units. The pixels 142 aredriven in a substantially similar manner as the driving waveform shownin FIG. 3.

FIG. 5 illustrates a pixel according to a second embodiment. As FIG. 5is explained, the components that are the same as those in FIG. 2 willbe given the same reference numerals, and any repetitive descriptionwill be omitted.

Referring to FIG. 5, a pixel 142 according to the present embodiment mayinclude an organic light emitting diode OLED and a pixel circuit 144′for controlling an amount of a current supplied to the organic lightemitting diode OLED.

A gate electrode of a sixth transistor M6 included in the pixel circuit144′ may be coupled to a second control line CL2. In detail, as shown inFIG. 3, a second control signal supplied to the second control line CL2,and a third control signal supplied to a third control line CL3 may beset to the same waveform. That is, in the present embodiment, the secondcontrol line CL2 and the third control line CL3 shown in FIG. 2 may beelectrically coupled. Therefore, even though the third control line CL3is omitted, and even though the sixth transistor M6 is coupled to thesecond control line CL2, the pixel 142 may be driven in the same manner.

FIG. 6 illustrates a pixel according to a third embodiment. As FIG. 6 isexplained, the components that are the same as those in FIG. 2 will begiven the same reference numerals, and any repetitive description willbe omitted.

Referring to FIG. 6, a pixel 142 according to the present embodiment mayinclude an organic light emitting diode OLED, and may include a pixelcircuit 1441 for controlling an amount of a current supplied to theorganic light emitting diode OLED.

The pixel circuit 1441 may include first to seventh transistors M1 toM7. The seventh transistor M7 may be coupled between an anode electrodeof the organic light emitting diode OLED and a second electrode of thefirst transistor M1. In more detail, The seventh transistor M7 may becoupled between a fourth node N4, which is a common node of the sixthtransistor M6 and the first transistor M1, and the anode electrode ofthe organic light emitting diode OLED. The gate electrode of the seventhtransistor M7 may be coupled to a second emission control line E2.

The seventh transistor M7 may be turned off when the second emissioncontrol signal is supplied to the second emission control line E2, andmay be turned on otherwise. For example, but without limitation, theseventh transistor M7 may be turned off during the first period T1, thesecond period T2, and the third period T3, and may be turned on duringthe fourth period T4.

If the seventh transistor M7 is turned off during the first period T1 tothe third period T3, the second power ELVSS may maintain a low voltageduring the first period T1 to the third period T3. That is, if theseventh transistor M7 is included in the pixel 142, the second powerELVSS may maintain a low voltage during the first period T1 to thefourth period T4.

FIG. 7 illustrates an embodiment of a method for driving the pixel shownin FIG. 6.

Referring to FIG. 7, the second emission control signal is supplied tothe second emission control line E2 during the first period T1 to thethird period T3, and accordingly, the seventh transistor M7 may beturned off. When the seventh transistor M7 is turned off, the firsttransistor M1 and the organic light emitting diode OLED are electricallyblocked. The second power ELVSS may maintain a low voltage Low duringthe first period T1 to the fourth period T4.

The second transistor M2 may be turned on during the first period T1 inresponse to the scan signal supplied to the scan line Sn. The fifthtransistor M5 may be turned on in response to the second control signalsupplied to the second control line CL2, and the sixth transistor M6 maybe turned on in response to the third control signal supplied to thethird control line CL3.

When the sixth transistor M6 is turned on, the voltage of the referencepower Vref may be supplied to the fourth node N4. When the secondtransistor M2 is turned on, the voltage of the reference power Vref maybe supplied to the third node N3 from the data line Dm. When the fifthtransistor M5 is turned on, the voltage of the reference power Vref maybe supplied to the first node N1. Here, the third node N3 and the firstnode N1 are set to the same voltage, and accordingly, the firstcapacitor C1 may be initialized. Additionally, because the thirdtransistor M3 maintains a turn on state during the first period T1, thesecond node N2 may be set to the voltage of the first power ELVDD.

The third transistor M3 is turned off as the first emission controlsignal is supplied to the first emission control line E1 during thesecond period T2. The fourth transistor M4 is turned on as the firstcontrol signal is supplied to the first control line CL1 during thesecond period 12.

When the third transistor M3 is turned off, the first power ELVDD andthe second node N2 may be electrically blocked. When the fourthtransistor M4 is turned on, the second node N2 and the first transistorM1 may be electrically coupled. Here, the first node N1 and the thirdnode N3 may maintain the voltage of the reference power Vref during thesecond period 12. Accordingly, during the second period 12, the voltageof the second node N2 may drop from the voltage of the first power ELVDDto a voltage that is a sum of the reference power Vref and the thresholdvoltage of the first transistor M1.

Here, the voltage corresponding to the threshold voltage of the firsttransistor M1 may be stored in the second capacitor C2. Additionally,the current from the first transistor M1 may flow to the reference powerVref via the sixth transistor.

The first control signal might not be supplied to the first control lineCL1 during the third period T3. Accordingly, the fourth transistor M4may be turned off. The data signal DS may be supplied to the data lineDm during the third period T3. The data signal DS supplied to the dataline Dm may be supplied to the third node N3. The third node N3 may beset to the voltage of the data signal DS. The first node N1 may maintainthe voltage of the reference power Vref. Accordingly, the voltagecorresponding to the data signal DS may be stored in the first capacitorC1. Additionally, the second node N2 maybe set to a floating stateduring the third period T3. Accordingly, the second capacitor C2 maymaintain the voltage charged in the preceding period. In other words,the voltage of the first node N1 to the third node N3 may correspond toFormula 1 during the third period T3.

The supply of the first emission control signal to the first emissioncontrol line E1 may be stopped during the fourth period T4. Accordingly,the third transistor M3 may be turned on. Also, the supply of the secondemission control signal to the second emission control line E2 may bestopped, and accordingly, the seventh transistor M7 may be turned on.Further, the supply of the scan signal to the scan line Sn may bestopped, and accordingly, the second transistor M2 may be turned off.Also, the fourth transistor M4 is turned on as the first control signalis supplied to the first control line CL1 during the fourth period T4.Additionally, the supply of the second control signal and the thirdcontrol signal to the second control line CL2 and the third control lineCL3 may be stopped, and the fifth transistor M5 and the sixth transistorM6 may thereby be turned off.

When the seventh transistor M7 is turned on, the first transistor M1 andthe organic light emitting diode OLED may be electrically coupled. Whenthe third transistor M3 is turned on, the voltage of the first powerELVDD may be supplied to the second node N2. The voltage of the secondnode N2 may increase to the voltage of the first power ELVDD from thevoltage that is a sum of the voltage of the reference power Vref and thethreshold voltage of the first transistor M1. Here, because the thirdnode N3 and the first node N1 are set to a floating state, the firstcapacitor C1 and the second capacitor C2 maintain the voltage of thepreceding period. During the fourth period T4, the voltage of the firstnode N1, the voltage of the second node N2, and the third node N3 maycorrespond to Formula 2.

When the fourth transistor M4 is turned on, the second node N2 and thefirst transistor M1 may be electrically coupled. The first transistor M1may control the amount of the current flowing from the first power ELVDDto the second power ELVSS via the organic light emitting diode OLED inresponse to the voltage of the first node N1. Therefore, the organiclight emitting diode OLED may generate light having luminancecorresponding to the amount of the current supplied from the firsttransistor M1 during the fourth period T4. Additionally, the current Isupplied from the first transistor M1 to the organic light emittingdiode OLED during the fourth period T4 may correspond to Formula 3.

The current flowing from the first transistor M1 to the organic lightemitting diode OLED during the fourth period T4 may be determinedindependently of the first power ELVDD and the threshold voltage of thefirst transistor M1. Accordingly, display quality may be enhanced.

FIG. 8 illustrates an embodiment in which the driving waveform shown inFIG. 7 is applied in concurrent driving.

Referring to FIG. 8, when the pixels 142 are driven with concurrentdriving, the second emission control signal may be supplied to thesecond emission control line E2 during the first period T1 to the thirdperiod 13′. Therefore, the seventh transistor M7 is turned off duringthe first period T1 to the third period T3′. Accordingly, the organiclight emitting diode OLED may be set to a non-light emitting state. Thesecond power ELVSS may maintain a low voltage during the first period T1to the fourth period T4.

If the pixels 142 are driven using a concurrent driving method, the scansignal may be concurrently supplied to the scan lines S1 to Sn duringthe first period T1 and the second period T2. The threshold voltage ofthe first transistor M1 may be compensated in each of the pixels 142during the first period T1 and the second period T2.

If the pixels 142 compensate the threshold voltage concurrently,sufficient time may be allocated in the second period T2, andaccordingly, each of the pixels 142 may compensate the threshold voltageof the first transistor M1 in a stable manner.

The scan signal may be sequentially supplied to the scan lines S1 to Snduring the third period 13′. The data signal DS may be supplied to thedata lines D1 to Dm. The pixels 142 may be sequentially selected by thescan signal supplied to the scan lines S1 to Sn, and may store thevoltage corresponding to the data signal DS.

The pixels 142 may concurrently emit light in the fourth period T4 inresponse to the voltage of the data signal DS stored the third periodT3′.

The driving waveform shown in FIG. 8 shows that the data signal DS issequentially stored in horizontal line units. The pixels 142 may bedriven substantially the same as they are driven with respect to thedriving waveform shown in FIG. 7.

FIG. 9 illustrates a pixel according to a fourth embodiment. As FIG. 9is explained, the components that are the same as those in FIG. 6 willbe given the same reference numerals, and any repetitive descriptionwill be omitted. For convenience of illustration, in FIG. 9, the pixelcoupled to the first scan line S1 and the m-th data line Dm will beshown.

The pixel 142 may be driven according to a sequential driving method,and the first emission control line E11, the second emission controlline E21, the first control line CL11, the second control line CL21 andthe third control line CL31 may be formed in every horizontal line(e.g., in every row of pixels).

In the pixel 142 shown in FIG. 9, the pixel circuit 1442 issubstantially the same as the pixel circuit 1441 shown in FIG. 6.Accordingly, the detailed description thereof will be omitted.

FIG. 10 illustrates an embodiment of a method for driving the pixelshown in FIG. 9.

Referring to FIG. 10, if the pixels 142 are driven using sequentialdriving, the scan signal may be sequentially supplied to the scan linesS1 to Sn, the first emission control signal may be sequentially suppliedto the first emission control lines E11, E12, . . . , E1n, and thesecond emission control signal may be sequentially supplied to thesecond emission control lines E21, E22, E2n. Similarly, the firstcontrol signal may be sequentially supplied to the first control linesCL11, CL12, CL1n, the second control signal may be sequentially suppliedto the second control lines CL21, CL22, CL2n, and the third controlsignal may be sequentially supplied to the third control lines CL31,CL32, CL3n.

The scan signal supplied to the first scan line 51 may be suppliedduring a first period T1′, a second period T2′, and a third period T3″.The second control signal may be supplied to the first second controlline CL21, the second control signal may be supplied to the first thirdcontrol line CL31, and the second emission control signal may besupplied to the first second emission control line E21 during the firstperiod T1′, the second period 12′, and the third period T3″.

The first control signal may be supplied to the first first control lineCL11 during the second period T2′, and the first emission control signalmay be supplied to the first first emission control line E11 during thesecond period T2′ and the third period T3″.

The operations are described as follows. First, the second transistor M2may be turned on by the scan signal that is supplied to the first scanline S1. The fifth transistor M5 may be turned on in response to thesecond control signal supplied to the first second control line CL21,and the sixth transistor M6 may be turned on in response to the thirdcontrol signal supplied to the first third control line CL31. Theseventh transistor M7 may be turned off in response to the secondemission control signal supplied to the first second emission controlline E21.

When the seventh transistor M7 is turned off, the fourth node N4 and theorganic light emitting diode OLED may be electrically blocked, andaccordingly, the organic light emitting diode OLED may be set to thenon-light emitting state.

When the sixth transistor M6 is turned on, the voltage of the referencepower Vref may be supplied to the fourth node N4. When the secondtransistor M2 is turned on, the voltage of the reference power Vref fromthe data line Dm may be supplied to the third node N3. When the fifthtransistor M5 is turned on, the voltage of the reference power Vref maybe supplied to the first node N1. Here, the third node N3 and the firstnode N1 may be set to the same voltage, and accordingly, the firstcapacitor C1 may be initialized.

Additionally, the third transistor M3 may maintain a turn on stateduring the first period T1′, and the second node N2 may thereby be setto the voltage of the first power ELVDD.

During the second period T2′, the third transistor M3 may be turned offbecause the first emission control signal is supplied to the first firstemission control line E11. During the second period T2′, the fourthtransistor M4 may be turned on as the first control signal is suppliedto the first first control line CL11.

When the third transistor M3 is turned off, the first power ELVDD andthe second node N2 are electrically blocked. When the fourth transistorM4 is turned on, the second node N2 and the first transistor M1 may beelectrically coupled.

During the second period T2′, the first node N1 and the third node N3may maintain the voltage of the reference power Vref. Accordingly,during the second period T2′, the voltage of the second node N2 may dropfrom the voltage of the first power ELVDD to the voltage that is a sumof the reference power Vref and the threshold voltage of the firsttransistor M1. The voltage corresponding to the threshold voltage of thefirst transistor M1 may be stored in the second capacitor C2.Additionally, the current from the first transistor M1 may flow to thereference power Vref via the sixth transistor M6.

The first control signal to the first first control line CL11 might notbe supplied in the third period T3″, and accordingly, the fourthtransistor M4 may be turned off. The data signal DS may be supplied tothe data line Dm during the third period T3″. The data signal DSsupplied to the data line Dm may be supplied to the third node N3. Thethird node N3 may be set to the voltage of the data signal DS. The firstnode N1 may maintain the voltage of the reference power Vref, andaccordingly, the voltage corresponding to the data signal DS may bestored in the first capacitor C1. Additionally, the second node N2 maybe set to the floating state during the third period T3″, andaccordingly, the second capacitor C2 may maintain the voltage charged inthe preceding period.

Thereafter, the supply of the scan signal to the first scan line S1 maybe stopped, the supply of the first emission control signal to the firstfirst emission control line E11 may be stopped, the supply of the secondemission control signal to the first second emission control line E21may be stopped, the supply of the second control signal to the firstsecond control line CL21 may be stopped, and the supply of the thirdcontrol signal to the first third control line CL31 may be stopped.

When the supply of the first emission control signal to the first firstemission control line E11 is stopped, the third transistor M3 may beturned on. When the supply of the second emission control signal to thefirst second emission control line E21 is stopped, the seventhtransistor M7 may be turned on. When the supply of the scan signal tothe first scan line S1 is stopped, the second transistor M2 may beturned off.

When the first control signal is supplied to the first first controlline CL11, the fourth transistor M4 may be turned on. When the supply ofthe second control signal and the third control signal to the firstsecond control line CL21 and the first third control line CL31 isstopped, the fifth transistor M5 and the sixth transistor M6 may beturned off.

When the seventh transistor M7 is turned on, the first transistor M1 andthe organic light emitting diode OLED may be electrically coupled. Whenthe third transistor M3 is turned on, the voltage of the first powerELVDD may be supplied to the second node N2. When the fourth transistorM4 is turned on, the second node N2 and the first transistor M1 may beelectrically coupled. The first transistor M1 may control the amount ofthe current flowing from the first power ELVDD to the second power ELVSSvia the organic light emitting diode OLED in response to the voltage ofthe first node N1.

Thereafter, as the scan signal is sequentially supplied to the secondscan line S2 to the n-th scan line Sn, the above-described processes arerepeated.

FIG. 11 illustrates a pixel according to a fifth embodiment. As FIG. 11is explained, the components that are the same as those in FIG. 2 willbe given the same reference numerals, and any repetitive descriptionwill be omitted.

Referring to FIG. 11, the pixel 142 according to the present embodimentmay include the organic light emitting diode OLED and the pixel circuit1443 for controlling the amount of the current supplied to the organiclight emitting diode OLED.

The pixel circuit 1443 may include a fourth transistor M4′ coupledbetween the second electrode of the first transistor M1 and the organiclight emitting diode OLED. The gate electrode of the fourth transistorM4′ may be coupled to the first control line CL1. The fourth transistorM4′ may be turned on when the first control signal is supplied to thefirst control line CL1, electrically coupling the first transistor M1and the organic light emitting diode OLED.

The pixel 142 according to the present embodiment operates the same asthe pixel shown in FIG. 2, and is different from it only with respect tothe position of the fourth transistor M4′. Therefore, the description ofthe detailed operations will be omitted.

FIG. 12 illustrates a pixel according to a sixth embodiment. As FIG. 12is explained, the components which are the same as those in FIG. 2 willbe given the same reference numerals, and any repetitive descriptionwill be omitted.

Referring to FIG. 12, the pixel 142 according to the present embodimentmay include the organic light emitting diode OLED and the pixel circuit1444 for controlling the amount of the current supplied to the organiclight emitting diode OLED.

The first electrode of a sixth transistor M6′ included in the pixelcircuit 1444 may be coupled to the anode electrode of the organic lightemitting diode OLED, and the gate electrode and the second electrode ofthe sixth transistor M6′ may be coupled to the third control line CL3.That is, the sixth transistor M6′ may be diode-connected, and may beturned on when the control signal is supplied to the third control lineCL3.

When the sixth transistor M6′ is turned on, the current may be suppliedfrom the first transistor M1 to the third control line CL3 during thesecond period T2. During the second period T2, the voltage of thereference power Vref may be prevented from changing due to the currentof the first transistor M1 during the second period 12.

The pixel 142 according to the present embodiment may operate the sameas the pixel in FIG. 2, with the exception of the position of the sixthtransistor M6′ being changed. Therefore, detailed driving processes willbe omitted.

FIG. 13 illustrates a pixel according to a seventh embodiment. FIG. 13,shows the pixel coupled to the m-th data line Dm and the n-th scan lineSn.

Referring to FIG. 13, the pixel 142 according to the present embodimentmay include the organic light emitting diode OLED, and the pixel circuit146 for controlling the amount of the current supplied to the organiclight emitting diode OLED.

The anode electrode of the organic light emitting diode OLED may becoupled to the pixel circuit 146, and the cathode electrode may becoupled to the second power ELVSS. The organic light emitting diode OLEDmay generate light having luminance corresponding to the amount of thecurrent supplied from the pixel circuit 146. For this, the first powerELVDD may be set to a higher voltage than the second power ELVSS.

The pixel circuit 146 may control the amount of the current flowing tothe organic light emitting diode OLED in response to the data signal DS.For this, the pixel circuit 146 may include first to sixth transistorsM11 to M16, the first capacitor C11, and the second capacitor C12.

The first electrode of the first transistor M11 may be coupled to thefirst power ELVDD via the fourth transistor M14, a second node N12, andthe third transistor M13, and the second electrode of the firsttransistor M11 may be coupled to the anode electrode of the organiclight emitting diode OLED. The gate electrode of the first transistorM11 may be coupled to the first node N11. The first transistor M11 maycontrol the amount of the current flowing from the first power ELVDD tothe second power ELVSS via the organic light emitting diode OLED inresponse to the voltage of the first node N11.

The second transistor M12 may be coupled between the data line Dm andthe first node N11. The gate electrode of the second transistor M12 maybe coupled to the scan line Sn. The second transistor M12 may be turnedon when the scan signal is supplied to the scan line Sn, therebyelectrically coupling the data line Dm and the first node N11.

The third transistor M13 may be coupled between the first power ELVDDand the second node N12. The gate electrode of the third transistor M13may be coupled to the first emission control line E1. The thirdtransistor M13 may be turned off when the first emission control signalis supplied to the first emission control line E1 and may be turned onin other circumstances. As the third transistor M13 is turned on, thevoltage of the first power ELVDD may be supplied to the second node N12.

The fourth transistor M14 may be coupled between the second node N12 andthe first electrode of the first transistor M11. The gate electrode ofthe fourth transistor M14 may be coupled to the first control line CL1.The fourth transistor M14 may be turned on when the first control signalis supplied to the first control line CL1, thereby electrically couplingthe first transistor M11 and the second node N12.

The fifth transistor M15 may be coupled between the third node N13 andthe reference power Vref. The gate electrode of the fifth transistor M15may be coupled to the second control line CL2. The fifth transistor M15may be turned on when the second control signal is supplied to thesecond control line CL2, thereby supplying the voltage of the referencepower Vref to the third node N13.

The sixth transistor M16 may be coupled between the anode electrode ofthe organic light emitting diode OLED and the reference power Vref. Thegate electrode of the sixth transistor M16 may be coupled to the thirdcontrol line CL3. The sixth transistor M16 may be turned on when thethird control signal is supplied to the third control line CL3, therebysupplying the voltage of the reference power Vref to the anode electrodeof the organic light emitting diode OLED.

The first capacitor C11 may be coupled between the first node N11 andthe third node N13. The second capacitor C12 may be coupled between thesecond node N12 and the third node N13. The first capacitor C11 and thesecond capacitor C12 may respectively charge a voltage in response tothe data signal DS.

In the pixel 142 according to the present embodiment, the positions oftransistors M12 and M15 may be different from the correspondingtransistors M2 and M5 of the pixel shown in FIG. 2. The pixel 142according to the present embodiment may be driven by the same drivingwaveform as the pixel shown in FIG. 2.

The method of driving the pixel 142 according to the present embodimentwill be described with reference to the waveform in FIG. 3. The secondtransistor M12 may be turned on in response to the scan signal suppliedto the scan line Sn during the first period T1. The fifth transistor M15may be turned on in response to the second control signal supplied tothe second control line CL2, and the sixth transistor M16 may be turnedon in response to the third control signal supplied to the third controlline CL3.

When the sixth transistor M16 is turned on, the voltage of the referencepower Vref may be supplied to the anode electrode of the organic lightemitting diode OLED. When the second transistor M12 is turned on, thedata line Dm and the first node N11 may be electrically coupled. Thevoltage of the reference power Vref from the data line Dm may besupplied to the first node N11. When the fifth transistor M15 is turnedon, the voltage of the reference power Vref may be supplied to the thirdnode N13. Here, the third node N13 and the first node N11 may be set tothe same voltage, and accordingly, the first capacitor C11 may beinitialized. Additionally, because the third transistor M13 may maintainthe turn on state during the first period T1, the second node N12 may beset to the voltage of the first power ELVDD.

The third transistor M13 may be turned off as the first emission controlsignal is supplied to the first emission control line E1 in the secondperiod 12. In the second period 12, the fourth transistor M14 is turnedon as the first control signal is supplied to the first control lineCL1.

When the third transistor M13 is turned off, the first power ELVDD andthe second node N12 may be electrically blocked. When the fourthtransistor M4 is turned on, the second node N12 and the first transistorM11 may be electrically coupled.

Here, the first node N11 and the third node N13 may maintain the voltageof the reference power Vref during the second period 12. Therefore,during the second period 12, the voltage of the second node N12 may dropfrom the voltage of the first power ELVDD to the voltage that is a sumof the reference power Vref and the threshold voltage of the firsttransistor M1. The voltage corresponding to the threshold voltage of thefirst transistor M11 may be stored in the second capacitor C12.Additionally, because the second power ELVSS is set to a high voltage,the current from the first transistor M11 may flow to the referencepower Vref via the sixth transistor M16.

In the third period 13, the supply of the first control signal to thefirst control line CL1 may be stopped, and accordingly, the fourthtransistor M14 may be turned off. The data signal DS may be supplied tothe data line Dm during the third period 13.

The data signal DS supplied to the data line Dm may be supplied to thefirst node N11. The first node N11 may be set to the voltage of the datasignal DS. The third node N13 may maintain the voltage of the referencepower Vref, and accordingly, the voltage corresponding to the datasignal DS may be stored in the first capacitor C11. Additionally, thesecond node N12 may be set to the floating state during the third periodT3, and accordingly, the second capacitor C12 may maintain the voltagecharged in the preceding period. In other words, during the third periodT3, the voltage of the first node N11, the voltage of the second nodeN12, and the third node N13 may correspond to Formula 4.N11=Vdata N12=Vref+Vth N13=Vref   Formula 4

In the fourth period T4, the supply of the first emission control signalto the first emission control line E1 may be stopped, and the thirdtransistor M13 may be turned on, and the supply of the scan signal tothe scan line Sn may be stopped, and the second transistor M12 may beturned off. Also, in the fourth period T4, the first control signal maybe supplied to the first control line CL1, and the fourth transistor M14may be turned on, and the supply of the second control signal and thethird control signal to the second control line CL2 and the thirdcontrol line CL3 may be stopped, and the fifth transistor M15 and thesixth transistor M16 may be turned off.

When the third transistor M13 is turned on, the voltage of the firstpower ELVDD may be supplied to the second node N12. The voltage of thesecond node N12 may increase to the voltage of the first power ELVDDfrom the voltage that is a sum of the voltage of the reference powerVref and the threshold voltage of the first transistor M11. Here,because the third node N13 and the first node N11 are set to thefloating state, the first capacitor C11 and the second capacitor C12 maymaintain the voltage of the preceding period. During the fourth periodT4, the voltage of the first node N11, the voltage of the second nodeN12, and the voltage of the third node N13 may correspond to Formula 5.N11=Vdata+ΔN12=Vdata+ELVDD−(Vref+Vth) N12=ELVDDN13=Vref+ΔN12=Vref+ELVDD−(Vref+Vth) Formula 5

When the fourth transistor M14 is turned on, the second node N12 and thefirst transistor M11 may be electrically coupled. The first transistorM11 may control the amount of the current flowing from the first powerELVDD to the second power ELVSS via the organic light emitting diodeOLED in response to the voltage of the first node N11. Therefore, theorganic light emitting diode OLED may generate light having luminancecorresponding to the amount of the current supplied from the firsttransistor M11. Additionally, during the fourth period T4, the current Isupplied to the organic light emitting diode OLED supplied from thefirst transistor M11 may correspond to Formula 6.

$\begin{matrix}\begin{matrix}{I = {k\left( {{Vsg} - {{Vth}}} \right)^{2}}} \\{= {k\left( {{Vref} - {Vdata}} \right)}^{2}}\end{matrix} & {{Formula}\mspace{14mu} 6}\end{matrix}$

The current I supplied to the organic light emitting diode OLED asdescribed in Formula 6 may be determined without regard to the firstpower ELVDD or to the threshold voltage of the first transistor M1.Therefore, the current may be supplied to the organic light emittingdiode OLED without being effected by the voltage drop of the first powerELVDD and the threshold voltage deviation of the first transistor M11.Accordingly, reliability in display qualities may be secured.

Additionally, in Formula 3, grayscale may be realized corresponding toVdata-Vref, and in Formula 6, grayscale may be realized corresponding toVref-Vdata. Therefore, the pixel in FIG. 2 and the pixel in FIG. 13 maybe provided such that the voltage of the data signal DS may be reversed.For example, but without limitation, the data signal corresponding tothe white grayscale in the pixel in FIG. 2 may be set to a data signalcorresponding to the black grayscale in the pixel of FIG. 13.

As described above, the pixel 142 according to the present embodimentmay be driven by the same driving waveform as the pixel shown in FIG. 2.In other words, it is possible to drive the pixel 142 according to thepresent embodiment in the same manner by using the concurrent drivingmethod shown in FIG. 4, and repetitive description will be omitted.

FIG. 14 illustrates a pixel according to an eighth embodiment. As FIG.14 is explained, the components which are the same as those in FIG. 13will be given the same reference numerals, and any repetitivedescription will be omitted.

Referring to FIG. 14, the pixel 142 according to the present embodimentmay include the pixel circuit 1461 and the organic light emitting diodeOLED.

The gate electrode of the sixth transistor M16 included in the pixelcircuit 1461 may be coupled to the second control line CL2. As shown inFIG. 3, the second control signal supplied to the second control lineCL2 and the third control signal supplied to the third control line CL3may be set to the same waveform. Therefore, even when the third controlline CL3 is omitted and the sixth transistor M16 is coupled to thesecond control line CL2, the pixel 142 may be driven in the same manner.

FIG. 15 illustrates a pixel according to a ninth embodiment. As FIG. 15is explained, the components which are the same as those in FIG. 13 willbe given the same reference numerals, and any repetitive descriptionwill be omitted.

Referring to FIG. 15, the pixel 142 according to the present embodimentmay include the pixel circuit 1462 and the organic light emitting diodeOLED.

The pixel circuit 1462 may include the seventh transistor M17 coupledbetween the fourth node N14 and the anode electrode of the organic lightemitting diode OLED. The gate electrode of the seventh transistor M17may be coupled to the second emission control line E2.

The seventh transistor M17 may be turned off when the second emissioncontrol signal is supplied to the second emission control line E2, andmay be turned on at other occasions. For example, but withoutlimitation, the seventh transistor M17 may be turned off during thefirst period T1 to the third period T3, and may be turned on during thefourth period T4.

When the seventh transistor M17 is turned off during the first period T1and the third period T3, the second power ELVSS may maintain the lowvoltage during the first period T1 to the third period T3. That is, ifthe seventh transistor M17 is added to the pixel 142, the second powerELVSS may maintain the low voltage during the first period T1 to thefourth period T4.

Additionally, the pixel 142 shown in FIG. 15 may be driven using theconcurrent driving and sequential driving methods. The operation of thepixel 142 is substantially the same as FIG. 13, and thus the detaileddescription thereof will be omitted.

FIG. 16 illustrates a pixel according to a tenth embodiment. As FIG. 16is explained, the components which are the same as those in FIG. 13 willbe given the same reference numerals, and any repetitive descriptionwill be omitted.

Referring to FIG. 16, the pixel 142 according to the present embodimentmay include the pixel circuit 1463 and the organic light emitting diodeOLED.

The first electrode of the sixth transistor M16′ included in the pixelcircuit 1463 may be coupled to the anode electrode of the organic lightemitting diode OLED, and the gate electrode and the second electrode ofthe sixth transistor M16′ may be coupled to the third control line CL3.That is, the sixth transistor M16′ may be diode connected and may beturned on when the control signal is supplied to the third control lineCL3.

When the sixth transistor M16′ is turned on, the current from the firsttransistor M11 may be supplied to the third control line CL3 from thefirst transistor M11 during the second period T2. During the secondperiod T2, the voltage of the reference power Vref may be prevented frombeing changed by the current from the first transistor M11.

The pixel 142 according to the present embodiment may be driven the sameas the pixel 142 in FIG. 13, and only the position of the sixthtransistor M16′ in the two pixels 142 is changed. Therefore, detaileddescription thereof will be omitted.

FIG. 17 illustrates a pixel according to an eleventh embodiment. As FIG.17 is explained, the components that are the same as those in FIG. 13will be given the same reference numerals, and any repetitivedescription will be omitted.

Referring to FIG. 17, the pixel 142 according to the present embodimentmay include the pixel circuit 1464 and the organic light emitting diodeOLED.

The sixth transistor M16″ included in the pixel circuit 1464 may becoupled between the second electrode of the first transistor M11 and theinitialization power Vint. The gate electrode of the sixth transistorM16″ may be coupled to the third control line CL3 The sixth transistorM16″ may be turned on when the third control signal is supplied to thethird control line CL3, and the voltage of the initialization power Vintmay be supplied to the fourth node N14.

Here, the voltage of the initialization power Vint may be set to avoltage lower than the data signal DS. When the sixth transistor M16″ isturned on, the current from the first transistor M11 may be supplied tothe initialization power Vint in a stable manner.

In the pixel 142 according to the present embodiment, the sixthtransistor M16″ may be coupled to the initialization power Vint only,and all other configurations are the same as the pixel in FIG. 13.Therefore, description on the detailed operations thereof will beomitted.

Also, the transistors are illustrated as PMOS for convenience ofillustration, the present invention is not limited hereto. In otherwords, the transistors may be formed as NMOS.

The organic light emitting diode OLED may generate various colors oflight including red, green and blue corresponding to the amount of thecurrent supplied from the driving transistor. However, the presentinvention is not limited hereto. For example, but without limitation,the organic light emitting diode OLED may generate white lightcorresponding to the amount of the current supplied from the drivingtransistor. Here, color image may be implemented using color filters orthe like.

Example embodiments have been disclosed herein, and although specificterms are employed, they are used and are to be interpreted in a genericand descriptive sense only and not for purpose of limitation. In someinstances, as would be apparent to one of ordinary skill in the art asof the filing of the present application, features, characteristics,and/or elements described in connection with a particular embodiment maybe used singly or in combination with features, characteristics, and/orelements described in connection with other embodiments unless otherwisespecifically indicated. Accordingly, it will be understood by those ofskill in the art that various changes in form and details may be madewithout departing from the spirit and scope of the present invention asset forth in the following claims and their equivalents.

What is claimed is:
 1. A pixel comprising: an organic light emittingdiode; a first transistor configured to control an amount of a currentflowing from a first power to a second power via a second node and theorganic light emitting diode in response to a voltage of a first node; afirst capacitor between the first node and a third node; a secondcapacitor between the second node and the third node, the secondcapacitor being directly coupled to the first capacitor; a secondtransistor between the third node and a data line and comprising a gateelectrode coupled to a scan line, the second transistor being directlycoupled to the data line and being directly coupled to both of the firstand second capacitors and being configured to transmit a data signal; athird transistor between the first power and the second node andcomprising a gate electrode coupled to a first emission control line,the third transistor being directly coupled to the second capacitor; afourth transistor between the second node and the first transistor, andconfigured to conduct the current flowing from the first power to thesecond power; and a sixth transistor directly connected to both theorganic light emitting diode and a reference power, wherein thereference power and the second power are different powers.
 2. The pixelas claimed in claim 1, wherein the second transistor is configured to beturned on in response to a scan signal supplied to the scan line during:a first period when the third node is initialized; a second period whena threshold voltage of the first transistor is compensated; and a thirdperiod when a voltage corresponding to the data signal is stored.
 3. Thepixel as claimed in claim 2, wherein a voltage of the reference power isconfigured to be supplied to the data line during the first period andthe second period, and wherein the data signal is configured to besupplied to the data line during the third period.
 4. The pixel asclaimed in claim 3, wherein the voltage of the reference power isconfigured to be within a voltage range of data signals configured to besupplied to the data line.
 5. The pixel as claimed in claim 2, whereinthe second power is configured to be a high voltage during the firstperiod, the second period, and the third period such that the organiclight emitting diode is configured to be turned off, and wherein thesecond power is configured to be a low voltage during a fourth periodsuch that the organic light emitting diode is configured to be turnedon.
 6. The pixel as claimed in claim 2, wherein the third transistor isconfigured to be turned on during the first period, and is configured tobe turned off during the second period and during the third period. 7.The pixel as claimed in claim 2, wherein the fourth transistor comprisesa gate electrode coupled to a first control line.
 8. The pixel asclaimed in claim 7, wherein the fourth transistor is configured to beturned on during the second period such that the organic light emittingdiode emits light.
 9. The pixel as claimed in claim 2, furthercomprising: a fifth transistor between the first node and the referencepower, and comprising a gate electrode coupled to a second control line,wherein the sixth transistor is between an anode electrode of theorganic light emitting diode and the reference power, and comprises agate electrode coupled to a third control line.
 10. The pixel as claimedin claim 9, wherein the fifth transistor and the sixth transistor areconfigured to be turned on during the first period, during the secondperiod, and during the third period, and are configured to be turned offwhen the organic light emitting diode emits light.
 11. The pixel asclaimed in claim 9, wherein the second control line is electricallycoupled to the third control line.
 12. The pixel as claimed in claim 9,wherein the reference power is configured to be within a voltage rangeof data signals configured to be supplied to the data line.
 13. Thepixel as claimed in claim 2, further comprising a seventh transistorbetween the first transistor and an anode electrode of the organic lightemitting diode, and comprising a gate electrode coupled to a secondemission control line.
 14. The pixel as claimed in claim 13, wherein theseventh transistor is configured to be turned off during the firstperiod, during the second period, and during the third period, and isconfigured to be turned on during a fourth period.
 15. The pixel asclaimed in claim 2, further comprising: a fifth transistor between thefirst node and the reference power, and comprising a gate electrodecoupled to a second control line; and wherein the sixth transistorcomprises: a first electrode between an anode electrode of the organiclight emitting diode and the first transistor; a gate electrode coupledto a third control line; and a second electrode coupled to the thirdcontrol line.
 16. The pixel as claimed in claim 15, wherein the fifthtransistor and the sixth transistor are configured to be turned onduring the first period, during the second period, and during the thirdperiod, and are configured to be turned off when the organic lightemitting diode emits light.
 17. A method of driving a pixel comprising afirst transistor configured to control an amount of a current flowingfrom a first power to a second power via a second node and an organiclight emitting diode in response to a voltage of a first node, a firstcapacitor between the first node and a third node, a second capacitorbetween the second node and the third node, and a sixth transistor, themethod comprising: supplying a voltage of a reference power to the firstnode and to the third node; supplying a voltage of the first power tothe second node; maintaining the voltage of the reference power at thefirst node and at the third node; blocking electrical coupling betweenthe second node and the first power; supplying the voltage of thereference power to the first node; supplying a voltage of a data signalto the third node via a second transistor; and controlling an amount ofa current supplied from the first transistor to the organic lightemitting diode in response to voltages of the first capacitor and thesecond capacitor, wherein the second capacitor is directly coupled tothe first capacitor, wherein the second transistor is directly coupledto a data line and is directly coupled to both of the first and secondcapacitors, the second transistor being configured to transmit the datasignal to the third node, wherein a fourth transistor is between thesecond node and the first transistor, and is configured to conduct thecurrent flowing from the first power to the second power, wherein thesixth transistor is directly connected to both the organic lightemitting diode and the reference power, and wherein the reference powerand the second power are different powers.
 18. The method as claimed inclaim 17, further comprising setting the reference power within avoltage range of data signals.
 19. The method as claimed in claim 17,further comprising setting the voltage of the second node to a sum ofthe voltage of the reference power and a threshold voltage of the firsttransistor during the blocking the electrical coupling.
 20. The methodas claimed in claim 17, further comprising setting the second node to afloating state during the supplying of the voltage of the data signal tothe third node.